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Hexamite Sensors

Assorted Sensor Evaluation Kits

The Timing Scope and the hx29 hardware can be useful for a conclusive test of all hexamite ultrasonic sensors and possibly be a fast modular route to the end market. The xmega Microcontrollers with unprecedented digital access to the real analog world, significantly reduce signal conditioning needs.  Below is a brief description of the hardware and software offered by hexamite.

The HX29 evaluation stack

The image on the right shows one hx29 structure that forms a complete instrument. Composed of three units: interface module (USB), xmega processing module and a signal conditioning module; this structure brings the realm of ultrasound to the programmers fingertips. The modules form a "pin socket bus" (PSB) piggybacked for space saving functionality. Four 3m screws that hold the modules together add strength to a snapped together ABS structure. In the following we will dissect the structure, module for module.

Note that the USB can be replaced with WiFi module

On the right the signal conditioning module has been removed, exposing the processor module. The processor module hosts an ATxmega128a4 processor from Atmel; highly advanced signal controller with an I/O subsystem, DMA, D/A, ADC and more. Hexamite provides a small operating system residing in boot memory, this operating system allows the user to upload programs into application memory directly through the USB port, without using a specialized programmer kit. Pins are also available for standard debuggers and programmers.

Above the processor module has been removed to expose the interface module usually on the bottom. The interface module has an FTDI USB interface providing speeds up to 2Mbit/Sec. A direct USB cable is connected through a micromatch connector. When the modules are stacked to create an assembly shown above and a sensor is plugged into the signal conditioning sockets. And if a computer connected to the interface module runs the timing scope the result is similar to what is shown below. To get the result below, a stack was placed on a table with the sensor shooting pulse trains to the ceiling, the waveform shown in the image below is the echo arriving roughly 10 milliseconds later.

The image on the left shows an application ready stack with a closed face.

The hexamite timing scope comes as a default program loaded into the processing unit. When the instrument stack receives power from the USB port it emits pulse train through the sensor. Following the pulses the stack transmits ascii data representing signals received by the sensor. The ascii data stream is interpreted and displayed by the windows PC timing scope as shown above. The three piggybacked modules will facilitate tests for all sensors offered by hexamite.

The Hexamite Timing Scope Software

The Actuation Signal bar can command sonic bursts up to 500Khz, with user selectable repetition. The length of the sonic burst can also be controlled. Timing options allow dead time and acquisition interval controls. The vertical scroll on the left side sets a trigger level, and the vertical scroll on the right side adjusts the signal to the middle of the frame. Sampling rates up to 1MS/S, and 7 gain steps can be selected. The signal frame is 12 bits wide meaning that the least significant bit represents change of about 4 micro volts at 64 x gain sufficient for most applications. With signal conditioning pre-amplification the least significant bit level goes down into the nanovolt range, well beneath the thermal noise level of most sensors.

The ATxmega128a4 Pin Socket Bus system

 Removed from the holding frames image on the right shows raw board stack. Piggybacked the bottom of a board plugs into the top of another, thus forming a bus system we refer to as "Pin Socket Bus" PSB. This configuration reduces the need for a special bus board, hence saving significant space. Total number of pins or bus lines are 36. Some pins are fixed and cannot be redefined, most of the lines are defined by the processor running the system. for the Xmega ATxmega128a4 the bus is defined as follows.

ATXMEGA128A4 configuration

1 PC3 (TCC0: OC0D) (AWEXC: OC0B) (USARTC0: TXD0)   I/O 13
2 PC4 (TCC1: OC1A) (AWEXC: !OC0C) (SPI: !SS)   I/O 14
3 PC5 (TCC1: OC1B) (AWEXC: OC0C) (USARTC1: XCK1) (SPI: MOSI)   I/O 15
4 Vcc Digital (3.2 - 10)Vdc   IN #
5 GND   NA #
6 PC6 (AWEXC: !OC0D) (USARTC1: RXD1) (SPI: MISO)   I/O 16
8 PD0 (TCD0: OC0A)   I/O 20
9 PD1 (TCD0: OC0B) (USARTD0: XCK0)   I/O 21
10 PD2 (TCD0: OC0C) (USARTD0: RXD0)   I/O 22
11 PD3 (TCD0: OC0D) (USARTD0: TXD0)   I/O 23
12 PD6 (USARTD1: RXD1) (SPID: MISO)   I/O 26
13 Vcc Digital (3.2 - 10)Vdc   IN #
14 GND   NA #
16 PE0 (TCE0: OC0A) (TWIE: SDA)   I/O 28
17 PE1 (TCE0: OC0B) (USARTE0 XCK0) (TWIE: SCL)   I/O 29
18 PE2 (TCE0: OC0C) (USARTE0 RXD0)   I/O 32
19 PE3 (TCE0: OC0d) (USARTE0 TXD0)   I/O 33
20 PDI DATA (used for debuggers and commercial programmers)   I/O 34 *
21 PDI CLK (used for debuggers and commercial programmers) RESET   I/O 35 *
22 Vcc Digital (3.2 - 10)Vdc   IN #
23 GND   NA #
24 ADC0  Volt in I/O 40
25 ADC1 Volt in I/O 41
26 ADC2 (ASYNC) Volt in I/O 42
27 ADC3 Volt in I/O 43
28 ADC4 Volt in I/O 44
29 ADC5 Volt in I/O 1
30 ADC6 Volt in I/O 2
31 Vcc Digital (3.2 - 10)Vdc   IN #
32 GND   NA #
33 ADC7 Volt in I/O 3
34 DAC0 (ADC10 ASYNC) Volt out I/O 6
35 DAC1 (ADC11) Volt out I/O 7
36 PC2 (TCC0: OC0C) (AWEXC: !OC0B) (USARTC0: RXD0)   I/O 12

Functions inside parentheses are the alternate functions for the specified pin

(SEE table 32-5 Xmega128 processor specifics.pdf)
# these pins have fixed definition, all other pins can be redefined for different processors
* CPU pins 35 and 34 are used for commercial programmers and inline debuggers

Hexamite offers the following sensor evaluation packages, please email service@hexamite.com for more information.

Assorted Sensors Evaluation System I

X euros

Assorted Sensor Bag
Main Processing Unit fully populated and assembled
TTL to USB Unit fully populated and assembled
Timing Scope software (WINDOWS)
MicroMatch to USB cable (to connect the interface unit to a USB port
AS Evaluation System II (incorporates Assorted Sensors Evaluation System I) PLUS

X euros

Signal Conditioning Unit fully populated and assembled
AS Evaluation System III (incorporates Assorted Sensors Evaluation System I and II) PLUS

X euros

Timing Scope Software Source Code (visual basic 6)
Main Processor Board Firmware Source Code (assembler)
AS Evaluation System IV (incorporates Assorted Sensors Evaluation System I, II and III) PLUS

X euros

Main Processing Unit Schematics and PCB Artwork (Eagle) and PDF format
Signal Conditioning Unit Schematics and PCB Artwork (Eagle) and PDF format
TTL to USB Unit Schematics and PCB Artwork (Eagle) and PDF format

Copyright 1999 [Hexamite]. All rights reserved. Revised: December 16, 2016 .